Microprocessor designers have increasingly endeavored to improve performance in various microprocessors by increasing clock speeds and adding parallelism. Large blocks of random access memory (RAM) are included within the microprocessor for data storage and for program storage in order to reduce memory access times. Direct Memory Access (DMA) circuitry is often provided to transfer data between peripheral devices connected to a microprocessor and memory connected to the microprocessor. DMA circuitry is initialized and a DMA transfer operation monitored by software which operates on the microprocessor. DMA circuitry may provide one or more channels of independent control. A detailed description of a six channel DMA controller is contained in U.S. Pat. No. 5,305,446, issued to Leach et al, which is incorporated herein by reference, particularly with reference to FIGS. 10, 11, 12a and 12b.
An object of the present invention is to reduce the amount of initialization and monitoring required of software operating on the microprocessor for a given DMA transfer operation.
Another object of the present invention is to allow variable transfer rates for receive and write transfers.